Optimizing Matrix Multiplication on Intel® Xeon Phi TH x200 Architecture

Bibliographic Details
Authors and Corporations: Guney, Murat Efe, Goto, Kazushige, Costa, Timothy B., Knepper, Sarah, Huot, Louise, Mitrano, Arthur, Story, Shane
Title: Optimizing Matrix Multiplication on Intel® Xeon Phi TH x200 Architecture
In: 2017 IEEE 24th Symposium on Computer Arithmetic (ARITH), 2017, p. 144-145
published:
IEEE
Physical Description:144-145
ISSN/ISBN: 978-1-5386-1965-0
978-1-5386-1964-3
1063-6889
ISSN/ISBN: 978-1-5386-1965-0
978-1-5386-1964-3
1063-6889
Summary:Matrix multiplication is ubiquitous in scientific computing. From computational science to machine learning, a large and diverse set of applications rely on the performance of general matrix-matrix multiplication (GEMM) subroutines. The Intel® Math Kernel Library(R) provides highly optimized GEMM subroutines that take full advantage of the available parallelism and vectorization in both Intel® Xeon® and Intel® Xeon Phi(TM) processors. In this paper we discuss the optimization of GEMM subroutines for the Intel® Xeon Phi(TM) x200 (code-named Knights Landing).
Type of Resource:E-Article
Source:IEEE Xplore Library
Language: English